@gkokovidis This was exactly what I needed. Thanks!

@Carl Love Very well spotted! I am indeed creating a synthesizer using the XR2206 IC. I realise that the right hand side is dimensionless, but this is based on the equation given in the datasheet for the XR2206, where the output frequency can be controlled by an input voltage (V_C in this picture):

To create the input voltage I am using a summation Op-amp to create the voltage:

@acer Yes, to some extent. To explain I think I should mention that the right-hand side of the equation does not really look like as I have written in my origonal equation. I apologise, it was meant to simplify my question a bit. Here's a more accurate representation of the equation:

And the Maple text:

restart;

R__1 := 1;
lign1 := V__i/(R__4*(1/R__1 + 1/R__2 + 1/R__3 + 1/R__4)) = (1 - (440*(2^(1/12))^(1 - 49)*R*C - 1)*R__C/R)*3;
lign2 := V__i*(1/R__1 + 1/R__4)/(1/R__1 + 1/R__2 + 1/R__3 + 1/R__4) = (1 - (440*(2^(1/12))^(2 - 49)*R*C - 1)*R__C/R)*3;
lign3 := V__i*(1/R__2 + 1/R__4)/(1/R__1 + 1/R__2 + 1/R__3 + 1/R__4) = (1 - (440*(2^(1/12))^(3 - 49)*R*C - 1)*R__C/R)*3;
lign4 := V__i*(1/R__3 + 1/R__4)/(1/R__1 + 1/R__2 + 1/R__3 + 1/R__4) = (1 - (440*(2^(1/12))^(4 - 49)*R*C - 1)*R__C/R)*3;
lign5 := V__i*(1/R__1 + 1/R__2 + 1/R__4)/(1/R__1 + 1/R__2 + 1/R__3 + 1/R__4) = (1 - (440*(2^(1/12))^(5 - 49)*R*C - 1)*R__C/R)*3;
lign6 := V__i*(1/R__1 + 1/R__3 + 1/R__4)/(1/R__1 + 1/R__2 + 1/R__3 + 1/R__4) = (1 - (440*(2^(1/12))^(6 - 49)*R*C - 1)*R__C/R)*3;
lign7 := V__i*(1/R__2 + 1/R__3 + 1/R__4)/(1/R__1 + 1/R__2 + 1/R__3 + 1/R__4) = (1 - (440*(2^(1/12))^(7 - 49)*R*C - 1)*R__C/R)*3;
solve([lign1, lign2, lign3, lign4, lign5, lign6, lign7], [R__4, R__2, R__3, R__C, R, C, V__i]);
 

You will notice that the right hand side does change at a somewhat regular interval. So yes, I guess some constraints are possible.